Harvard architecture

 

Harvard Architecture based computer consist of separate memory spaces for the programs (or instruction) and data.

· Each memory space has its own address and data bus. Thus both instruction and data can fetch from memory concurrently.

· It provides significant processing speed improvement.

· There are two data and two address buses for the program and data memory spaces respectively.

· The program memory data bus and data memory data are multiplexed to form single data bus.

· Similarly, program memory Address and data memory address are multiplexed to form single address bus.

· Hence there are two blocks of RAM chips; one for program memory and another for data memory space.

· Data memory address unit generates data memory address. The data memory address bus carries the memory address of data where as program memory address bus carries the memory address of the instruction.

· Central arithmetic logic unit consists of the ALU, multiplier, Accumulator, etc.

· The program counter is used for next instruction to be fetched.

· Control unit control the sequence of operations to be executed.

· The data and control bus are bidirectional where as address bus is unidirectional.